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Altera_Forum
Honored Contributor
Honored ContributorDoes changing the Simulink simulation options change the HDL code generation
Hello all, I am a DSP Builder starter and having read the DSP Builder Advanced Blockset manual I still have some questions. So is it so that the VHDL code generation is affected by changin...
Altera_ForumHonored Contributor
Honored ContributorIts only depent on the blocks, but you can only generate VHDL code from fixed step solver.
