DMA & FIR Filter, some questions.

Here is one way: http://www.altera.com/support/examples/nios2/exm-accelerated-fir.html It's based on the master templates you have found already.

But if it was me what I would do is build a FIR filter with a streaming input, streaming output, and a slave port so that the coefficients can be updated. Then I would take the filter and wedge it between the read and write master of this DMA engine: http://www.altera.com/support/examples/nios2/exm-modular-scatter-gather-dma.html I'm referring to that source port on the left (read master) that wires directly to the sink port on the right (write master). That's a plain Avalon-ST connection so if your filter supports ST then it should drop in pretty easily. You can configure the DMA engine with the bare minimum features you need which should keep the resource utilization down to..... 600LEs or less and probably 6 M9K blocks. If you rip the dispatcher frontend off and build a non-buffering one you can probably reduce the memory utilization to two on-chip memory blocks.