New Contributor
New ContributorHi Frank,
Thank you for your support again.
For context, we are working on implementing a passive optical network (PON)-like optical switching scheme. This approach aligns with the description in an Altera note, which reports a CDR lock time of 267.5 ns in Table 1. The same note also states that “the Stratix IV and Stratix V families of FPGAs have integrated burst-mode CDR SERDES that can support a variety of optical transceivers available in the market.” This suggests that some of the Altera-provided resources could potentially be reused or adapted to enhance our current implementation.
Given that our setup employs a highly stable reference clock, we believe it should be possible to achieve a lock time even shorter than 267.5 ns. However, we have not been able to locate a suitable example project or detailed documentation that demonstrates how the burst-mode CDR is implemented on Stratix IV devices with the integrated transceiver.
Would you be able to advise where we might find the relevant reference designs or documentation? Your assistance would be greatly appreciated.
Best regards,
Hank
Super ContributorHi Hank,
thank you for explaining about PON burst mode requirements. My personal optical network experience is limited to continuous fibre channels, e.g. 10G Ethernet.
Provided that mentioned Stratix IV sync time of about 300 ns is sufficient for your application and 1.3 us is not, it sounds like you need to get a burst mode enabled SFP+ 10G module. There are apparently some on the market, but I must confess they didn't occur to me before I explicitely searched for.
I see by the way a maximum receiver settling spec of 800 ns in IEEE 802.3-2018 75.5.2 Receiver optical specifications for 10G/10G EPON.
Regards
Frank
