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Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- Two things I can think of: 1 - It seems to me you need to clip each field to 262 lines. 2 - 54MHz should be enough. You might try upping it. How big is the line buffer in the CVI? Jake --- Quote End --- So, move the clip after the de-interlacer? CVI->de-interlace-clip(262 lines)->CVO Yes we are running 4:2:2 -- YCb/Cr Speeding up the sopc_clk will give the clip and de-interlacer a faster clock. What would you recommend? Should it be a simple multiple of the output clock or input clock? Does it need to be a simple multiple? We are feeding the PLL with th pixel clock from the decoder. Thanks,