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Altera_Forum's avatar
Altera_Forum
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18 years ago

DDR/DDR2 HP compiler - multiple devices

Hi,

I am trying to drive two DDR devices from one instance.

I have made the settings in the wizard, so I am getting two clock pairs, 2 cke's and so on.

But the ras/cas/adress signals needs to be directly mapped to an io port.

My problem is that the DDR devices are connected as standalone units, so i need to "split" the signals. I am doing this by mapping the adress signal to a internal signal, and then mapping the internal signal to the IO ports. (If I drive a single IO it works OK).

I am getting this error:

Error: WYSIWYG I/O primitive "DDR:DDR_upper_banks|DDR_controller_phy:DDR_controller_phy_inst|DDR_phy:alt_mem_phy_inst|DDR_phy_alt_mem_phy_sii:DDR_phy_alt_mem_phy_sii_inst|DDR_phy_alt_mem_phy_addr_cmd_sii:adc_2t_en_gen.adc|DDR_phy_alt_mem_phy_ac_sii:addr[12].addr_struct|altddio_out:full_rate.addr_pin|ddio_out_7ed:auto_generated|dataout[0]" is not properly connected to a top level pin.

Anybody know how I may hack myself around this?

Thanks

Geir

12 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi,

    as I said it is an old design. I have to adapt to that.

    Please read what I wrote earlier.

    Anyway, it works using a single instance of the legacy controller.

    g
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hello,

    may be i misunderstood your description "operate as one", it seems to me contrary to previous formulation of your requirements. Doesn't matter anyway, if you found a solution.

    Best regards,

    Frank