Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

DDR3 SDRAM Unimemphy issue with qsys design

Hi there, I am beginner with DDR3 and try to integrate DDR3 SDRAM(MT41J128M16) with NIOS.My qsys design is having NIOS,DDR3 SDRAM Controller,JTAG UART and interconnect bridges. The issue is t...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

By the way I just noticed a setting in the Uniphy controller I have never noticed before called "Enable support for the Nios II ModelSim flow in Eclipse" in the UI. I recommend enabling that option since I suspect the code memory intialization will not work correctly without it.