Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

DDR3 Mirroring

Hi - I am trying to demystify the "mirroring" setting in the DDR3 controller. I am using a stratix iv device to implenet a Dual Rank 4GB by 4 RDIMM from Hynix. One of the parameters I have not been able to understand is the MIRROR setting in the controll (using HPII) - How do I know if the RDIMM uses mirroring - I have asked HYNIX tech support and they respong - we support it (?) - I have not been able to find any info on all the datasheets.

Also how do you apply the mirroring - this module has a dual rank - so the possible settings would be "01" 10" "11" How do I know which to apply?

Thanks

Allan

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    Usually the 2nd rank of a DIMM would be mirrored, so for:

    1. Controller for 1 DIMM of dual rank configuration:

    Mirror Addressing Option in the Uniphy Megafunction GUI would be set to a value of 10 (Rank1 - Rank0)

    2. Controller for 2 DIMMs of dual rank configuration:

    Mirror Addressing Option in the Uniphy Megafunction GUI would be set to a value of 1010 (DIMM1,Rank1 - DIMM1,Rank0 - DIMM0,Rank1 - DIMM0,Rank0)

    As I understand it, the purpose for address mirroring is that the DRAM ICs on the back of the DIMM module are mirrored from the ICs on the front. Rather than the memory module provider having to criss cross all of the address lines on the PCB for the back side DRAM ICs, the controller will do the address swapping in the FPGA when writing to the back side DRAM ICs.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    kguitarguy is correct. Mirroring is a JEDEC specification feature to allow for easier layout of dual rank DIMMs and improved signal integrity. The manufacturer of the DIMM should state on the datasheet whether or not this layout has been used.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    13 years ago

    also note that when mirroring is turned on, the only thing that happens is that the sequencer program changes slightly to account for the mirrored addressing on the odd ranks.

    something might differ in the altera memory controller but in my project we don't use altera's controller, so i don't know.

    forgetting to turn on mirroring for 2 rank unbuffered dimms is a common reason for calibration to fail on the 2nd rank. the uniphy configuration wizard does not do this automatically when 2 ranks is selected.