DDR3 High Performance Controller II in 9.1

In 9.1, SOPC recommends that we use the High Performance Controller II for DDR3,

rather than the (non-II) High Performance Controller. I'm on an S4GX. The

HPCII works fine on the board, but the simulator (NC Verilog IUS 8.2) does not

like the syntax in the SOPC generated file:

The error I get is:

.../alt_ddrx_timers.v,1818|11): expecting a function name [10.3.1(IEEE)].

The corresponding code in alt_ddrx_timers.v is:

function reg [WR_TO_RD_WIDTH - 1 : 0] max;

input [WR_TO_RD_WIDTH - 1 : 0] value1;

input [WR_TO_RD_WIDTH - 1 : 0] value2;

....

It is complaining at the first line there. I got sims to work by changing that whole

function to be:

function integer max;

input integer a,b;

begin

max = (a<b) ? b : a;

end

endfunction

IUS 8.2 is pretty recent. Anybody else having this problem?