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Altera_Forum
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16 years ago

DDR2 Write data generation with Native Interaface

Dear All, Am using stratix III device, successfully generated DDR2 controller. I simulated the DDR2 with the example driver code generated by the tool. Chosen native Interface for read/write opera...
Altera_Forum's avatar
Altera_Forum
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16 years ago

Well it's been quite some time since I looked at the example driver. But I believe delaying the local_wdata_req simply makes it look like an "ACK" rather than a request. So if your write data is ahead of the controller (meaning you're presenting it to the controller and just waiting for it to acknowledge) it may be easier to delay the signal and use it as an ack.

Jake