Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

DDR2 with Cyclone V

Have anyone been able to control a DDR2 SDRAM using the UniPHY Megacore IP from Cyclone V?? Im trying to do so, I have use this same memory with a Cyclone III before and im using the same circu...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Did you tried to run RTL simulation using modelsim or any other simulation tool?

Check if the cal_successful signal is asserted or not.