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Altera_Forum
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12 years ago

DDR2 with Cyclone V

Have anyone been able to control a DDR2 SDRAM using the UniPHY Megacore IP from Cyclone V?? Im trying to do so, I have use this same memory with a Cyclone III before and im using the same circu...
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Altera_Forum
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11 years ago

I reduced the speed interface to 200MHz, I can validate the timing, but the calibration still fails.

So that I can pass the calibration I've had to configure the "Advanced Clock Phase Control" parameter:

"Additional Command And Clock Phase : 115 degrees".

But then the timing analysis fails.

Altera support answers was: Soft controller is not suppported for your speed grade 8 CycloneV (5CSEBA6U23C8).

Very happy to know that at this step of the project...