Forum Discussion
Altera_Forum
Honored Contributor
17 years agoDDR2 SODIMM Verification + probing solutions
Hi all, I hope I don't get shouted at for posting a verification thread on this forum - sorry if there's a more appropriate forum but I thought some of you here may have been through this already....
Altera_Forum
Honored Contributor
17 years agoThanks again Jake.
Regarding HyperLynx - we didn't budget for this initially - but you can hire it by the month which we did and it was very worthwhile. Check out your Mentor rep if the offer that where you are. The main issue in layout we're facing is trying to distribute the power nets around the FPGA which ends up splitting planes. We're striving not to have any high-speed DDR2 nets crossing over any of these splits as per memory and FPGA vendor's app. notes. Any feedback on this particular issue would be good. Stephen