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Altera_Forum
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17 years ago

DDR2 reading errors on last two words

Hi, I've some problems with my ddr2 design. I use Altera DDR2 high performance IP on pci express dev board (Stratix II GX). I build some logic around my memory controler in order to test...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

If you don't get timing errors related to SignalTap, you can basically trust it's results. As far as I understand, SignalTap shpws read faults as the missing pnf output does. If it occurs at accidental positions in the test, it's most likely a signal quality or timing issue. If we can assume, that the Dev. Board hardware is O.K., it must be related to your settings.