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Altera_Forum
Honored Contributor
Honored ContributorDDR2 on two sides - one controller
Hello, We are using an Arria II with DDR2 chips on two sides of the FPGA. Is there a way to aggregate the two and control them with one instance of the DDR2 HP controller? We are using HP and...
Altera_ForumHonored Contributor
Honored ContributorWith this approach, the commands to the DDR have to complete at the same time for both chips. I don't know if the DDR command completion time is cycle-based or depends on other parameters / conditions.
Do you know if I can guarantee that the same command sent to the both chips at the same time will complete at the same clock cycle?
