--- Quote Start ---
We are using an Arria II with DDR2 chips on two sides of the FPGA. Is there a way to aggregate the two and control them with one instance of the DDR2 HP controller? We are using HP and not HP II. The two chips do not share any signals.
--- Quote End ---
Can't you just aggregate the DDR2 chips (of both sides) into a single (wide) Altmem_PHY. Having a copy of the address and command bus for each side should be handleable by the Quartus II SW. (if it can't: file an SR!?)
See external memory interface handbook volume 2: section i. device and pin planning (
http://www.altera.com/literature/hb/external-memory/emi_plan_pin.pdf): page 1-4
Honored Contributor
