DDR2 IP Controller Write Performance Question

Thanks for the valuable feedback. Unfortunately, the burst size is limited to 4 per the board vendor (Opal-Kelly ZEM4310 board with a Cyclone IV E). I'm not sure where this constraint comes from, the on-board SDRAM (16-bit IO) or the Altera DDR2 controller, or a combination. The Altera documentation says 4 in places, 8 in other places, and up to 64 in yet others, depending on the context. A larger burst size sure would be helpful.