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Altera_Forum
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14 years ago

DDR2 HPC2 Timing Simulation fails

Hello, i am trying to get the example design for the DDR2 Memory controller (HPC2 with ALTMEMPHY) to work. I have spent already a whole week on this issue, but I cant get it to run. I am using ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

does anyone have an idea, what the problem with the bit errors could be? I tried the DE3 example design and it works fine. When I use the same settings for my design it doesn't work well. Bit errors occur every once in a while. Not always, but sometimes. I have no idea what else I should do. I tried everything already. Please help me!

Best regards,

Martin