DDR2 HPC2 Timing Simulation fails

Hello Martin,

See [here (http://www.altera.com/literature/hb/external-memory/emi.pdf#page=1219)] about the termination block and pins. We use two pins that are named RUP2 and RDN2 (located E25/D26 on our Arria II GX in 1152 pin package), and RUP2 is connected to 1.8 V via a 49.9 Ohm resistor, RDN2 to GND via another 49.9 Ohm resistor. The following are the only assignments in our QSF about them:

set_location_assignment PIN_E25 -to termination_blk0~_rup_pad
set_location_assignment PIN_D26 -to termination_blk0~_rdn_pad

You will certainly find the right candidate pins on your Stratix III package on the DE3 board. If you haven’t already … :)

Again, I suggest you work through Volume 6, Section 1–4 of the emi (http://www.altera.com/literature/hb/external-memory/emi.pdf#page=1251) covering a complete walkthrough of DDR2-HPC2/ALTMEMPHY with Stratix III. Don’t pass a step, don’t take shortcuts ;) And it should bring you 400 MHz (DDR2-800) given correct timing parameters.

In the process of raising the memory frequency, you may have to find exact pin models, i.e. trace lengths, near and far end loads as well as termination resistors. I would assume that the HPC2 can operate at higher frequencies if it is working at half the frequency (and twice the data width), so you should try that option.

My design on Arria II GX95 Grade 5, with just a rough pin model, gave no timing violation at 233 MHz but had a corner temperature problem at 266 MHz. In the lab, it worked at 266 MHz nevertheless and I got the calibration success and init_done. And this was done _including_ the SignalTap with a full-rate controller. I clock the SignalTap with the phy_clk, according to the following line in my QSF, so I think there should be no problems getting to 266 and even 333 MHz in your Stratix III:

set_instance_assignment -name CONNECT_TO_SLD_NODE_ENTITY_PORT acq_clk -to "ddr2_32bit:ddr2_32bit_inst|ddr2_32bit_controller_phy:ddr2_32bit_controller_phy_inst|phy_clk" -section_id auto_signaltap_0

I know that one is tempted to start off with all parameters set to max performance, but this results in very slow to no development progress if you don’t hit the sweet spot of functionality with your first shot. Start with a slow clock and no other components, get comfortable with SignalTap, choose the right controller and bridge configuration, raise the frequency, fine-tune your memory model (CAS timing, etc.) and analog pin characteristics.

Hope this helps,

– Matthias