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Honored Contributor

14 years ago

DDR2 HPC2 Timing Simulation fails

Hello, i am trying to get the example design for the DDR2 Memory controller (HPC2 with ALTMEMPHY) to work. I have spent already a whole week on this issue, but I cant get it to run. I am using ...

multiple-attachments.zip539 KB

Altera_Forum

Honored Contributor

14 years ago

here (http://www.altera.com/literature/hb/external-memory/emi_ddr_ug.pdf#page=11) I read that Timing Simulation is still one of the unsupported features of DDR/DDR2 Controllers with ALTMEMPHY.

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DDR2 HPC2 Timing Simulation fails

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