Forum Discussion

Honored Contributor

16 years ago

DDR2 controller: error msg for bi-directional clock.

Hi, I'm getting the following error when trying to fit a full-rate DDR2 controller to my Stratix III device. "Error: Bidirectional pins mem_clk[0] and mem_clk_n[0] with pseudo-differentia...

Altera_Forum

Honored Contributor

16 years ago

Two things:

1 - Make sure you've made the clk pins "inout" or "bidir" on your top level design file.

2 - Make sure you're adhering to table 8-3 in the user's guide:

http://www.altera.com/literature/hb/stx3/stx3_siii51008.pdf

Jake

Forum Discussion

DDR2 controller: error msg for bi-directional clock.

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