Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorDDR or DDR2 SDRAM controller
I builded a DDR or DDR2 SDRAM controller using QuartusII MegaWizard Plug-In, ip toolbench. It should have self-testing function. But I can not run it in QuartusII's simulation. No DDR address, data...
Altera_ForumHonored Contributor
Honored ContributorI come back. :)
i add the ddr.vo to the work and simulate ,modelsim display: ** Error: (vsim-3033) E:/FPGA/video_delay/ddr2.vo(29703): Instantiation of 'oper_add' failed. The design unit was not found. why? I miss a lib?
