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Altera_Forum
Honored Contributor
15 years agoDDR HPCII calibration successful but then only works briefly
I am trying to run DDR DRAM using an HPCII. I have Quartus II V10.0 SP1, and a Cyclone III FPGA. My DRAM initialises, calibration is successful and local_ready goes high, both in simulation and on th...
Altera_Forum
Honored Contributor
11 years agois there "proper_beats_in_fifo" somewhere in quartus 14.1 ddr3 UniPHY IP? i'm searching and can't find it...