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Altera_Forum
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11 years ago

DCFIFO simultaneous read and write problem

I'm having problems with the dcfifo IP block when simulating in modelSim. I'm using the same clock on both the read and writes ports, I'm only using the dual clock FIFO as I want to feed data i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Also I was missing the generic add_usedw_msb_bit <= "ON".

Looks like Altera should really be putting some assertions within the IP code that check the configuration.