Forum Discussion
DCFIFO Mixed Width Recovery Removal Timing
- 3 years ago
Which device and Quartus version do you plan to use? I always recommend users to use the latest Quartus version as usually a lot of bug has been fix with latest version.
The post do mentioned that:
This is a bug in the DCFIFO generation for mixed widths when the read side is smaller than the write side, for instance the write side it 256 bits wide and the read side is 16 bits wide. In cases where you are seeing the above, make sure the asychronous reset into the DCFIFO is synchronized to the write side, then change the external reset to be synchronized to the read side clock domain. You will see two recovery violations to the write side aclr synchronization registers and it is OK to false path them.
Isn't the sentence in bold, the workaround provided?
You may checkout this user guide as well:
Best Regards,
Richard Tan
Thank you for acknowledge the solution provided.
I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you.
Best Regards,
Richard Tan
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.