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Altera_Forum
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11 years ago

DC in the CIC-FIR filter result

Hi All, I have attached a figure showing my filter issue. Please subtract 28 MHz from the x axis values (it was a typo). It is apparent that there is a strong DC peak in the plot. My question i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

Hi Kaz,

How to reduce DC in the mixer stage? I think my dc is generated from the mixer stage. I checked the baseband I and the 0 frequency is -5 dbm and (+-)50KHz is +66 dbm when the noise level is about -47 dbm. I guess I need to reduce the DC to around noise level. These results are from ModelSim. (Note the digram above is from the FPGA not modelsim).

I have discarded 28 bits from the cic output so the DC should be not from cic. The sum of fir coefficient is 4. I will rescale it to 1.

Many Thanks,

Lee