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NGord's avatar
NGord
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

Cyclone V errata TLP Corruption in x2 Mode

I have just noticed Cyclone V errata TLP Corruption in x2 Mode. Can you please shed some extra light on this, it was only posted last year after about 10 years! We have been using x2 mode for yea...
Pcie
  • VenT_Altera's avatar
    VenT_Altera
    2 years ago

    Hi @NGord,


    Yes, redesigning it to Gen 1x4 with only 2 lanes connected will provide the same throughput.


    Thanks.

    Best Regards,

    VenTing_Intel


VenT_Altera's avatar
VenT_Altera
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi @NGord,


I’m glad that your question has been addressed. I now transition this thread to community support. If you have a new question, please login to https://supporttickets.intel.com/, view details of the desire request, and post a feed or response within the next 15 days to allow me to continue to support you. After 15 days, this thread will transition to community support. The community users will be able to help you with your follow-up questions.


Thanks.

Best Regards,

VenTing_Intel


p/s: If any answers from the community or Intel support are helpful, please feel free to mark them as solutions, give them kudos, and rate 4/5 for the survey.