Cyclone V DSP Cost 36x36 signed multiplication

I can reproduce the problem but unfortunately I don't see a solution. According to the documentation each block should be able to do two independent 18*19 bit multiplications. As you need 4 of them to do a 36*36 multiplication, 2 blocks should be enough.

Looking at the technology viewer after synthesis, it looks like Quartus does combine the two multiplications that must be summed (high word of one operand by low word of the other) in a single block, but uses two other blocks for the other two multiplications. I tried tweaking a bit with the project settings, to no effect. Using some VHDL code instead of the LPM_MULT block produces the same results. Even forcing the maximum available DSP blocks to 2 doesn't do the trick. There is either a bug in Quartus or a limitation in the usage of those multiply blocks that is not documented. Or am I missing somtething obvious?

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