Cyclone V - major transceiver misunderstanding

Hi Dave,

you are right.... maybe too much text.

I attached the system I'm simulating on.

You need to generate the qsys file into a subfolder called e_rtscpu_sx and then run "source run_simulation.tcl" in modelsim. It should start a 50us simulation, where the alignment is performed and after that "user data" is transferred.

In the 16bit (FPGA to XCVR interface) version, everything works as expected.

In the 32bit version, I get the above mentioned issue and alignment only works when I switch the received 16 LSB to MSB and vice versa.

You are right, in practice, I may need additional encoding, but I first would like to get the bit slipping alignment to work and would like to test that also in HW. Just out of curiosity....

Regards,

Maik