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Altera_Forum
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14 years ago

Cyclone IV GX with LVDS Transceiver and Nios II

Hello, i have a little problem to implement a lvds transceiver interface to my Cyclone IV GX design. The Transceiver interfaces are directly connectet to the FPGA, you can see this on th...
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Altera_Forum
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14 years ago

Hi,

I have a second problem with the Cyclone IV GX Transceiver I Use the Quartus 11.0Sp1 Software and i have the same Error Message:

error: I/O bank QL0 contains input or bidirectional pins with I/O standards that make it impossible to choose a legal VCCIO value for the bank

info: Can't select VCCIO 1.5V for I/O bank due to 1 input or bidirectional pins

info: Input or bidirectional pin rx_datain[0] uses I/O standard LVDS

like in this Thread: http://www.alteraforum.com/forum/showthread.php?p=130079#post130079

have any one a solution?