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Altera_Forum
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12 years ago

cyclone II ALTLVDS_RX ipcore issue？

i am using ALTLVDS_RX ipcore on cyclone II device, but meet a problem that rx parral datas are not correct. the following is the ipcore configration. any advice? ALTLVDS_RX_component.buffe...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Did you check the signal coming to the FPGA? How does the eye diagram look?

How is the clock? Does the pll loose lock?

Did you write timing constrains for your design and does the compile project meet timing requirements?