Occasional Contributor
Regular ContributorHi,
As I understand it, you are observing the Native PHY RX seems to be stuck in calibration. To further narrow down the issue, it is recommended to create a simple test design with only duplex Native PHY + TX PLL + reset controller. Then place on the same pinout to see if can replicate similar observation. This would be helpful to narrow down to Native PHY and facilitate debugging. Just would like to check with you the specific Quartus version that you are using? It is recommended for you to try with the latest Quartus version to see if there is difference to narrow down Quartus version dependent issue.
Generally the calibration would auto take place after device power up with the condition:
1. CLKUSR directly sourced from a free-running clock source ie on-board oscillator and stable before power up
2. Frequency for CLKSUR should be from 100 MHz to 125 MHz.
3. All the refclks that drive Native PHY and TX PLL need to be free-running and stable as well prior to power up
Please help to verify the above conditions to see if can spot any anomaly.
Also, please help to look into if there is any anomaly with the XCVR related power supplies.
Please let me know if there is any concern. Thank you.
Best regards,
Chee Pin
Occasional ContributorThanks for the reply. Here are answers to your questions:
1) I am using Quartus 19.3, not the latest but still pretty recent. I'm willing to try upgrading, but I feel pretty certain the HDMI IP has been used successfully with this version (or older).
2) I will try a design with just the gxb_rx and see if it will calibrate. I'll report back with results.
3) We have verified that CLKUSR is a working, 100 MHz free-running clock. The HDMI IP has two refclks specified, one (fr_clk) is a free-running clock that we also have connected to an external 100 MHz clock input. I will verify that the clocks are all stable before device power-up is complete.
