Occasional Contributor
Frequent ContributorHi Pieter,
Perhaps you can try with a newer version of quartus and generate the IP into the short path. Sorry that I have no idea with the .tcl file, and the problem is not able to replicate at my side.
I run the simulation and it is complete less than 15 minutes. Below is the end of the transcript.
It is expected the transcript referring to other device because some of the file is re-use and not change the device name accordingly. Anyway, this should be improve to avoid user confusion. I will channel this back to development team.
# INFO: 77960 ns BAR Size Assigned Address Type
# INFO: 77960 ns --- ---- ----------------
# INFO: 77960 ns BAR1:0 64 KBytes 00000001 00010000 Prefetchable
# INFO: 77960 ns BAR3:2 256 Bytes 00000001 00000000 Prefetchable
# INFO: 77960 ns BAR4 Disabled
# INFO: 77960 ns BAR5 Disabled
# INFO: 77960 ns ExpROM Disabled
# INFO: 79104 ns
# INFO: 79104 ns Completed configuration of Endpoint BARs.
# INFO: 79920 ns ---------
# INFO: 79920 ns TASK:downstream_loop
# INFO: 80720 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 81512 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 82280 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 83048 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 83800 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 84560 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 85328 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 86096 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 86872 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# INFO: 87656 ns Passed: 0004 same bytes in BFM mem addr 0x00000040 and 0x00000840
# SUCCESS: Simulation stopped due to successful completion!
# Simulation passed
Occasional ContributorHi Tan Boon Chiek,
Thanks for the suggestion.
Anyway, the simulation ended in
# SUCCESS: Simulation stopped due to successful completion!
# Simulation passed
What about the other questions:
1/ Do you have a drawing with a block diagram of the various modules in the system setup? (more detailed than Figure 3 in the ug_dex_a10_pcie_avst_pdf document)
2/ The transcript references to Stratix II, Stratix III, IV and V. Does this matter when mapping this to the Cyclone10GX? ( i understand in a future version you will try to accomodate a cyclone only mapping)
Looking forward to your feedback.
Frequent Contributor1. That is the only block diagram that we have for the example design. So, the answer is no.
2. Actually I sent the answer before. I paste it again here:
It is expected the transcript referring to other devices because some of the files are re-use and not change the device name accordingly. Anyway, this should be improved to avoid user confusion. I will channel this back to the development team.
