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brian1211
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3 years ago

CXL type 3 example design increase to 128GB per channel?

What needs to change in the CXL type 3 example design to increase the Memory to 128GB per channel? I tried changing the emif IP to a DIMM, and updated the scripts to not define ENABLE_DDR_DBI_PINS....
Cxl
brian1211's avatar
brian1211
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Tried to attach a *.qar but it's too big.