No, I'm not trying to generate composite with colour burst etc.
But yes you are correct, I am doing a component RGB output using a DAC (as on the lancelot board) and generating the composite sync using a XOR - This works fine in my application via a SCART connector. I am 100% sure the DAC circuit etc. is correct because its an existing product board (I am trying to replace our 'home spun' graphics circuitry with fancy new Altera IP)
So 864 pixels is the whole line at 13.5Mhz? OK so if my active picture line is 720 pixels that leaves me 144 pixels for Hsync and the front and back porches...
So at say 74nS (13.5Mhz) per pixel clock:
We have to have 4.7uS for Hsync - Thats 63.51 pixels - lets call it 63.
leaves 144 - 63 = 81 pixels.
Front porch has to be 1.65uS - Thats 22.29 pixels - lets call it 22.
leaves 81 - 22 = 59 pixels.
This means the back porch will be 59 pixels or only 4.36uS.
Using these figures I get Vsync for both fields! - sadly at 51.57Hz.
My Hsync measures as 4.64uS Which is OK
My front porch measures as 1.2uS and Back porch 4.96uS which are not quite what I was expecting but thats tweakable.
The biggest problem is active video still starting to early - around lines 7 or 8 ish.. My graphics are going to be too high up the screen..
I have attached some pics for your viewing pleasure - thanks for the comments so far - any more are most welcome!