Forum Discussion
Altera_Forum
Honored Contributor
14 years agoHi,
I cannot see a "smoking gun", but do have a few questions: I pressume you are monitoring the status of the graphics CVI via the NIOS? Do you see any FIFO overflow or loss of synchronisation? This may sound like a stupid question, but are you sure the SW on the NIOS is not unintentionally disabling the CVI core? Have you verified (by reading the control register) that the core remains enabled? One way in which the core can become (unintentionally) disabled is if the SW is writing to an unimplemented register address - the address decoding produced by SoPC is not complete and writes to unused addresses can alias into used addresses. This can easily happen in debugging software where fragments of old or temporarily unused code starts lying around. Regards, Niki