connecting 32 bit data to 128 bit data with avalon

The memory controller is probably going to issue waitrequest for around 500us from T=0 to simulate the initialization and calibration cycle of the memory. I vaguely recall it will accept a few burst requests then have to backpressure due to it's command queue being full (can't issue the reads/writes if the memory isn't functional yet).

I think that controller has simulation settings to minimize this period of time so I would double check what they are set to since you might be just not running your simulation long enough with the current settings.