Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Configuring triple speed ethernet MAC with National DP83848 PHY in MII interface

Hi

I am trying to make a design with a triple speed ethernet MAC from Altera work. I am using a National DP83848 PHY and the small 10/100 version of the MAC. I have attached a snapshot of my schematics to this thread

The design compiles and the LED in the RJ45 connector is working when I download the design into my FPGA.

I have tried to use web server template for my software. I have modified the web server by removing buttons etc. so it should work with my design, but when I launch the software then it crashes/hangs. I can see that the program crashes between the call to function

alt_iniche_init();

/* Start the Iniche-specific network tasks and initialize the network

* devices.

*/

and the call to the function

netmain();

/* Wait for the network stack to be ready before proceeding. */

The first time I run the program I am asked to reset the program after I have entered the MAC-address where I have used the MAC address from my development kit. Then I reset the program then it crashes

I guess that the problem is that I have to setup some status registers in the PHY to make it work or something like that, but I can not find any places in the web server where the registers in the PHY are set.

All I have done so far is to

- design hardware in Quartus

- download hardware to FPGA

- modify the webserver by removing function for button etc.

- launch the webserver

My hope is that NIOS IDE handles the HAL for the ethernet and sets up the software layers for the ethernet as I do not know a lot about these things.

What more do I need to do to make the Ethernet work?

How do I test if I send an receive packages?

I am also thinking about how to test the content of the packages. My plan is to attach my board to my Laptop with a crossed cable and use the hyperterminal like I do with my UART. Does hyperterminal work for this purpose or is there an easier/better way?

Thanks

Tom

15 Replies

Show More
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    Did you find out why your DP83848 was getting very hot?

    I have a similar problem with that PHY device. Actually 2 on a single board. Each one gets very hot like a power to ground short to latch-up.

    I'm having a lot of trouble figuring out why.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    I had the same heat problem and it turned out my VCCIO levels was accidentally wrong. Make sure the 1.8V, 2.5V and RC filtered supplies are all correctly configured, and especially that the VDD_SEL_STRAP pin is correspondingly strapped to your VCCIO.

    Are all these rails the correct voltage? Especially the RC-filtered pins, are they still 1.8V? If those pins draw excessive current there will be a larger voltage drop across the resistors.

    Do the chips actually work or are they dead? When operating in GB mode they do get quite hot, but otherwise they're only moderately warm.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    After contacting support for the board manufacturer and National Semi support, we're returning our board for replacement, suspecting defective DP83865DVH devices.

    Board manufacturer support said this was a "known problem" and are reworking boards to resolve. Temporary work around was to force the negotiated speed to 100 Mbps or below. Didn't work for us. One device showed a negotiated speed of 100 Mbps but still didn't work in the tx direction. The other device stayed at 1 Gbps (though it was never connected to anything capable of 1 Gbps) and showed no signs of life. Both devices were very hot to the touch from the first time they were configured.

    National Semi support said getting very hot in a few seconds means a faulty DP83865DVH part or possibly a board problem -- should return to board mfgr.

    Also, here's a thread on another forum where defective DP83865 devices are discussed:

    listsDOTgnuDOTorg/archive/html/discuss-gnuradio/2010-04/msg00603.html
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    --- Quote Start ---

    Hi teilersen,

    I have made my own custom Cyclone III Nios board with the DP83848 PHY and it works fine. I also used the TSE MAC from Altera.

    I began with the simple socket server project and then I moved on the webserver project.

    Did you success in your project?

    I can help you if you have any questions..

    Just a last thing, did you configure a system clock in SOPC builder, UCOSII and Interniche need this feature to work..

    Regards,

    -Pierre

    --- Quote End ---

    Now I do the same work as you did,Can I communication with you though private email?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    15 years ago

    I'm working on bringing up an TSE Mac with DP83848. So far I have been unable to locate a reference design that shows how the TSE MAC is connected to the NIOS and the accompanying software. I know the Bemicro kit from Arrow uses this chip but so far they have been unable to provide any Ethernet examples.

    Any help appreciated, going to start looking at old dev kits to see if I can find one that uses the DP83848. Thanks

    David