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Altera_Forum
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18 years ago

Configuring triple speed ethernet MAC with National DP83848 PHY in MII interface

Hi I am trying to make a design with a triple speed ethernet MAC from Altera work. I am using a National DP83848 PHY and the small 10/100 version of the MAC. I have attached a snapshot of my sc...
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Altera_Forum
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17 years ago

Hello,

I'm back on FPGA stuff, a little bit late for the answer but anyway maybe it will be useful for other people on this forum. The FPGA should have its own oscillator (i.e 50mhz), the 25Mhz clock output seems to be a little bit dangerous... because this chip communicates with the FPGA and so... (chicken and egg story..). I have one oscillator for the FPGA and for the DP83848. If anyone try this configuration (providing clock from DP83848 to FPGA) please don't hesistate to leave a message.

Regards,

-Pierre