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Altera_Forum
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12 years ago

Clocked Video Output :Standalone CVO block for controlling DVI monitor

I'm developing an imaging system using the TR4 development kit. Specifically, I'm feeding raw digital data into the FPGA and driving this raw data into a DVI connector(by way of the Bitech HSMC-DVI i...
Altera_Forum's avatar
Altera_Forum
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12 years ago

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2. I understand that the CVO block will accept data only in the Avalon ST-format. So does this mean that if I can generate the SOP(Start of Packet) and EOP(End of Packet) timing signals (in addition to the DVI clock), I can simply parse a 24 bit word into the CVO? I tried to implement this but it doesn't seem to work.

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It's not "just" Avalon-ST. It is the Avalon-ST Video Protocol, which is described starting on page 3-2 of ug_vip.pdf

I'm pretty sure at a minimum, you need to send along one Control packet followed by your endless stream of Data packets. Your Data packets which you basically already have, just need to be modified to make sure they indicate the correct "Packet Type" field on the first symbol of the packet. Other than that, there isn't a lot to it.