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Altera_Forum
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17 years ago --- Quote Start --- Foram, This sequence does not appear to work for me Am I correct in assuming set functions start with 0? (i.e. 0 is mode 1?) I defensively coded aiming for mode "2", just in case, so I won't care if it's the 2nd or 3rd in the sequence. My process...
// 3 modes chosen as available in wizard
Clocked_Video_Output cvo(CLOCKED_VIDEO_OUT_BASE);
while (cvo.get_output_fifo_usedw() == 0) { }
cvo.clear_fifo_underflow();
// long pause
cvo.start(true); //start cvo
cvo.set_valid(2, false); //set mode 3 invalid (or is it 2?)
cvo.configure(2); //configure register settings for this mode
cvo.stop(true); //stop cvo
cvo.set_valid(0, false); //set lower modes invalid
cvo.set_valid(1, false); //set lower modes invalid
cvo.set_valid(2, true); //set my mode valid
cvo.start(true); //start cvo
VidModeMatch register returns 0. Possible problem. The reference design shows 18 registers per mode, but the VIP User Guide shows 19 registers. I tried it both ways. (At one point it was returning a 4 but I still don't know why) My own data dump of the registers indicates to me it's probably 18. Tons of 1s, followed by some garbage values. The 1s end where 18 registers per mode would end. (18*14+4 registers) The test pattern generator is generating a 640x480 progressive signal, and I am putting in 640x480 progressive in cvo.configure(). --- Quote End --- Hi William, well, I am using direct address offset and IOWR functions to configure diffenrt output modes. (i am using Quartus 8.0 and VIP suit 8.0. ) I assumed the registers 4-22 are for the mode, configured in SOPC builder, as this was the only way to disable the pre-configured mode. you mentioned in the last post, that registers 4-21 are for mode1 .. But registers 4-22 are for mode1. So may be you are by mistake using a wrong offset address for setting the mode valid invalid. IOWR(MY_ALT_VIP_ITC_BASE, 41 , 0); // mode-2 invalid IOWR(MY_ALT_VIP_ITC_BASE, 23 , 0); // non interlaced IOWR(MY_ALT_VIP_ITC_BASE, 24 , 640); // width IOWR(MY_ALT_VIP_ITC_BASE, 25 , 480); // height IOWR(MY_ALT_VIP_ITC_BASE, 28 , 12); // Horizontal front porch IOWR(MY_ALT_VIP_ITC_BASE, 29 , 64); // horizontal sync IOWR(MY_ALT_VIP_ITC_BASE, 30 ,144); // HORIZONTAL BLANK IOWR(MY_ALT_VIP_ITC_BASE, 31 , 10); // vertical front porch IOWR(MY_ALT_VIP_ITC_BASE, 32 , 1); // vertical sync IOWR(MY_ALT_VIP_ITC_BASE, 33 , 120); // vertical blank IOWR(MY_ALT_VIP_ITC_BASE, 41 , 0); // mode-2 invalid stop(MY_ALT_VIP_ITC_BASE,1); IOWR(MY_ALT_VIP_ITC_BASE, 22 , 0); // mode-1 invalid IOWR(MY_ALT_VIP_ITC_BASE, 41 , 1); // mode-2 valid start(MY_ALT_VIP_ITC_BASE);