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marqs_ic's avatar
marqs_ic
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3 years ago
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Clocked Video Input II vid_datavalid width is 1 regardless of pixels in parallel parameter

Hi,

I'm feeding oversampled video into CVI II IP and trying to make it only read every Nth pixel. There seems to be vid_datavalid signal for exactly this purpose, but its width does not get expanded when "pixels in parallel" is increased from 1, thus the feature becomes unusable when processing is parallelized which seems like a bug. I tried to work around this by adjusting vid_de accordingly, but that seems to break mode detection in certain cases.

  • ZH_Intel's avatar
    ZH_Intel
    3 years ago

    Hi marqs_ic,

    Good day.

    Thank you for your input.

    Will convey it to our internal team on this.

    Do you still have further inquiries on this issue?

    If there is no further question, I will transition this thread to community support.

    Thank you.

    Best Regards,

    ZulsyafiqH_Intel

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  • marqs_ic's avatar
    marqs_ic
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    3 years ago

    Hi,

    I'm not sure why simulation would be needed to confirm the issue. Just instantiating CVI II IP in Platform Designer (configured with at least 2 pixel in parallel) and generating verilog shows that vid_datavalid input port width is always 1. The overall design is not based on any examples or reference design.

  • ZH_Intel's avatar
    ZH_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi marqs_ic,

    Good day.

    Just to update you, I am still liaising and waiting feedback from our internal team on this issue.

    Will update you as soon as I have their feedback.

    Thank you.

    Best Regards,

    ZulsyafiqH_Intel

  • ZH_Intel's avatar
    ZH_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi marqs_ic,

    Good day.

    Thank you for your patience.

    After further discussion with our internal team, I am afraid the CVI II does not support this usage model and as this is a non common use of it.

    The method that you are trying to use the core in, is in a way that it does not support and at the moment, there is no plan to do so.

    Thank you.

    Best Regards,

    ZulsyafiqH_Intel

  • marqs_ic's avatar
    marqs_ic
    Icon for New Contributor rankNew Contributor
    3 years ago

    I see. I'd then appreciate if VIP documentation was updated with a statement that oversampling is not supported in this kind of scenario as-is and needs workarounds (as in my example above).

  • ZH_Intel's avatar
    ZH_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi marqs_ic,

    Good day.

    Thank you for your input.

    Will convey it to our internal team on this.

    Do you still have further inquiries on this issue?

    If there is no further question, I will transition this thread to community support.

    Thank you.

    Best Regards,

    ZulsyafiqH_Intel

  • ZH_Intel's avatar
    ZH_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    3 years ago

    Hi marqs_ic,


    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread.

    Thank you.

    Best Regards,

    ZulsyafiqH_Intel