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Altera_Forum
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16 years ago

Clock-Error --> Two ports have different clocks, where they should have the same

Hi People, I make a filterbank with 32 IIR-bandpassfilter --> 32x16 coefficient. the application is a mp3-encoder/decoder in dsp-builder. I have resolt my schematic with LUT for reduce mul...
Altera_Forum's avatar
Altera_Forum
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14 years ago

Perhaps, you should check the data sheet for the Cyclone II device and verify what frequencies it supports.

By trial and error, I've found that the PLL block reports that it's unable to implement the configuration if the Ouput period exceeds 100ns. There are other circumstances where it fails, but the data sheet should say what's allowed.