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Altera_Forum
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14 years ago

checksum_accelerator

An example of SOPC component build has been provided by ALTERA in -altera avalon checksum accelerator design example readme version 3.0. in this example the controller and checksum calculator compone...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Thanks for the information. But I am not using Qsys and further, I also see clk and reset being used in one of the modules i.e,. the readmaster module of the same example. I don't know why clk / reset and clock_reset/clock_reset_reset are used in the different modules of the same example on checksum accelerator hardware component.? Any clarifications on this ?