Can't generate F-Tile Ethernet Hard IP Design Example

Question

When I try to generate an example design for the F-Tile Ethernet Hard IP or even the F-Tile Low Latency 100G Ethernet IP, the generating step gets stuck in a loop and will stay that way until I manually stop it in Task Manager. Has anyone else encountered this issue?

paveetirrasrie_altera · Answer

Hello,
&nbsp;
May I know which Quartus version you're working with? Do the issue still persist?
&nbsp;
Regards,
Pavee

dc3 · Answer

I upgraded to 25.3.1 and now I get this error.&nbsp;

dc3 · Answer

After retrying again, the generation step loops like before. Is there any way I could get a pre-made example design to download instead?

paveetirrasrie_altera · Answer

Hello,
&nbsp;
Form the screenshot you've provided, the design has error. You won't be able to generate the design with error.
Please select the valid Device Initialization Clock and continue with generation.
&nbsp;
Regards,
Pavee

dc3 · Answer

There is no option to select any Device Initialization Clock. How do I find it?

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Can't generate F-Tile Ethernet Hard IP Design Example

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