Forum Discussion
dc3
New Contributor
5 months agoCan't generate F-Tile Ethernet Hard IP Design Example
When I try to generate an example design for the F-Tile Ethernet Hard IP or even the F-Tile Low Latency 100G Ethernet IP, the generating step gets stuck in a loop and will stay that way until I manua...
paveetirrasrie_Altera
Frequent Contributor
5 months agoHello,
May I know which Quartus version you're working with? Do the issue still persist?
Regards,
Pavee
- dc35 months ago
New Contributor
I upgraded to 25.3.1 and now I get this error.
- paveetirrasrie_Altera4 months ago
Frequent Contributor
Hello,
Form the screenshot you've provided, the design has error. You won't be able to generate the design with error.
Please select the valid Device Initialization Clock and continue with generation.
Regards,
Pavee
- dc34 months ago
New Contributor
There is no option to select any Device Initialization Clock. How do I find it?
- paveetirrasrie_Altera4 months ago
Frequent Contributor

You may select it from Target Development Kit Tab.