Forum Discussion
AnandRaj_S_Intel
Regular Contributor
6 years agoHi Jhon,
You have to Instantiatiate the IP in your top-level design and write simple control logic to read & write from memory location.
Have you gone through the session Coding Example for Manual Instantiation in FIFO Intel FPGA IP User Guide?
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_fifo.pdf
For example, refer below link and search for keyword(FIFO).
https://www.intel.com/content/www/us/en/programmable/support/literature/lit-ip.html
Regards
Anand