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Rahul_S_Intel1
Frequent Contributor
5 years agoHi ,
Sorry to keep you to wait this much long , I have done my research, kindly find the details.
When the PCIe HIP , setting is made as root port , the pin_perst configured as input , the same I have verified with Stratix 10 example design.
Kind find the attached screen shot for PCIe HIP for your reference which I took from the example design.
- Wujun5 years ago
New Contributor
Hi ,
The pin_perst configured as input?
->From the screen shot, pin_perst is just an internal signal, but I need a pin name which can be found in the Intel® Stratix® 10 Device Family Pin Connection Guidelines. Do you mean when S10 is setting as root port, nPERST pin can be used and be configured as output?