JFran57New Contributor6 years agoCan Intel® MAX® 10 FPGAs be immerse in Midel 7131 for the FPGA's life without the Midel 7131 affecting the part's life?
Recent DiscussionsAgilex 7 I F-Tile Direct PHY: example TB doesn't workAbout the System PLL in Agilex 5Agilex 7 F-Tile 200G hard IP de-feature clarificationAgilex7 F-TILE ethernet hard IP 200GSolvedStratix 10 fPLL is cascade source mode doesn't lock