Can FrameBuffer be connected to onchip-FIFO,and then to SGDMA?

Socrates,Thank you very much!

Sorry for I'm so newbie in FPGA,I'm not quite clear about your meanings.

I think I didn't express our applications pretty clear.

We want to use FPGA to act as a Bridge which sends raw video data to out SOC through PCIe.

And use SGDMA to send video data to PCIe IP provided by altera.

You mean that I should use a dual-port RAM?

Just like "FrameBuffer--> DualPort RAM--->SGDMA“?

Regards!

What is the resolution and bit depth of the video you want to frame buffer?

Do you want a double or triple buffer?

You will almost certainly not have enough on-board memory if you have video of any

significant size.

For instance, to triple buffer color video at VGA resolution, you would need a minimum of

24 (bits per pixel) * 640 (columns) * 480 (rows) * 3 (buffers) = 21,600 Kbits

of embedded memory, which not even the largest Cyclone V devices are supporting.

You will almost certainly need an external SDRAM or SRAM in order to frame buffer your video.

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I'd offer to download framebuffer demo from alterawiki.com :)

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Thank you gwall.

The FrameBuffer write video buffer to RAM with address is added.

I thought I can Link FrameBuffer to onchip FIFO in Qsys.

It should be wrong.The FrameBuffer write data with the writing address is added after every write cycle,not write to a constant address.

Thanks Socrates.Regards!