Honored Contributor
Honored ContributorIt's the burst count associated to the local side (the part you interface with in your logic). A burst of greater than 1 means you are performing back to back accesses by issuing a single address and providing data for multiple beats (words) of data. The controllers are now able to accept small bursts or non-burst (burst length = 1) transactions and form bursts off-chip to the SDRAM to ensure the interface is being used efficiently.
I never use that controller in non-Avalon mode but I'm certain you can still use the burst signal since it's a fundamental signal for achieving higher memory performance.
